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3(n-o(1)) circuit lower bound from gate elimination

100%

In this notes we are going to see how to prove $3(n-o(1))$ lower bound for an explicit function against general circuits of fan-in two. The idea is based on gate elimination in which one eliminates one bottom gate at a time with the guarantee that there will be many gates becoming trivial and thus can be eliminated too.

Overview

In this notes, we focus on boolean circuits with gates of fan-in at most $2$. Recall that the final goal is the following.

There exists an explicit family of function ${f_n}$ such that for any $n\in\N$, any size $3(n-o(1))$ circuit does not compute $f_n$.

We are going to prove the above theorem in three steps.

  1. Preprocessing: given an arbitrary circuit, turning it into a nice form without increasing the circuit size.
  2. Affine disperser: defining a notion for boolean functions that are resistant to affine restriction.
  3. Gate elimination: showing that for any circuit in the nice form, there exists an affine restriction that eliminates at least four gates (including the input gate).

Preprocessing

Let us start with an observation on fan-in two boolean functions $f(x,y)$. There are 16 such functions and they can be categorized into the following four types:

An XOR circuit is a special circuit where the inputs are XORs of the variables and the interior gates are non-XOR-type functions. The following lemma shows that any circuit can be turned into an XOR circuit without increasing the number of gates (including input gates).

Let $C$ be a circuit of $s$ many gates, then there exists an XOR circuit $C’$ of at most $s$ gates that computes the same function as $C$.

This can be done by a simple induction on the depth of the circuit.

The reason why we are working on XOR circuits will be clear in the gate elimination part. The intuition is that the other three types of fan-in two functions are easier to be eliminated than the XOR-type.

Affine disperser

Recall that an affine space in $\mathbb{F}_{2}^{n}$ is simply a linear subspace of $\mathbb{F}_{2}^{n}$ with a shift. For example, the solution space of $\oplus_{i\in[n]}x_i=1$ is an affine subspace. The dimension of an affine subspace is defined as the dimension of the corresponding linear subspace.

Further, one would notice that affine subspace is tightly connected to system of linear equations as the above example. Concretely, the solution space of any system of linear equations is an affine subspace and vice versa. Moreover, the dimension of an affine subspace is related to the number of linear equations in the following way. If there are $d\in[n]$ consistent and linearly independent linear equations, then the dimension of the solution space is $n-d$.

Now, we can define the notion of affine disperser. It is simply a function that is non-constant in any affine subspace of large enough dimension.

Let $f:\bit^n\rightarrow\bit$ and $d\in[n]$. We say $f$ is a $d$-affine disperser if for any affine space $A$ of dimension at least $d$.

Explicit constructions for $d(n)$-affine disperser is known for $d(n)=o(1)$ and this is all we need to know for now.

Gate elimination via affine restrictions

Now, what’s left is showing that for each XOR circuit, there exists an affine restriction that eliminates at least four gates. Combining with the existence of sub-linear dimensional affine disperser, we yield the desiring $(3-o(1))n$ circuit lower bound. Let us start with stating this elimination lemma and prove that the $(3-o(1))n$ lower bound immediately follows.

For any XOR circuit $C$ of size $s$ for function $f$, there exists a consistent affine restriction $R$ of codimension $1$ such that there exists a circuit of size at most $s-4$ that computes $f|_R$.

Before we prove the above lemma, let us see why it implies the $(3-o(1))n$ lower bound.

Let $f$ be the $d(n)$-affine disperser with $d(n)=o(n)$. Suppose for contradiction that there exists a circuit $C$ of $s(n)=4(n-d(n)-1)$ many gates for $f$. Note that here we count both the interior gates and the input gates.

After the preprocessing, we have an XOR-circuit of size at most $s(n)$ for $f$. Applying Lemma (gate elimination via affine restrictions) for $n-d(n)-1$ times, we get a consistent affine restrictions $R$ of dimension at least $d(n)+1$ and a circuit $C’$ of size at most $s(n)-4(n-d(n)-1)=0$. That is, $C’$ computes a constant function. However, by the definition of affine disperser, $f|R$ is a non-constant function. Namely, we get a contradiction and thus $f$ cannot be computed by circuit of at most $s(n)-n=3(n-d(n)-1)=(3-o(1))n$ many interior gates.

Now, let us prove the miain elimination lemma as follows. The idea is simply doing case analysis.

The idea is looking at the fan-out of input gates and make good use of the fact that all the interior gates are not of XOR-type. We can also wlog assume the interior gates are not constant otherwise we can eliminated it without any effort.

Suppose there is an input gate $g$ having fan-out two and connecting to interior gates $g_1,g_2$. Also, either $g_1,g_2$ must connect to at least one other interior gate otherwise we can eliminate them without any effort. Wlog, assume $g_1$ connects to $g_3$. See the following figure.

Now, as all of $g_1,g_2,g_3$ are either degenerate or of AND-type, we have two observations: (i) no matter what we fix $g$ to, both $g_1$ and $g_2$ will become constant and (ii) there is a way to set $g$ such that $g_3$ also becomes constant. For example, if $g_1,g_2,g_3$ are all AND, by setting $g$ to 0, all of them are also forced to become 0 and thus we can eliminate them! That is, in the case where there is an input gate of fan-out two, we can eliminate four gates (including the input gate) by one affine restriction.

Next, consider the case where all of the input gates are of fan-out one. Then there exists gates $g_1,g_2,g_3,g_4$ as the following figure.

Similarly, there exists a way to set $g_1$ and eliminate all of $g_3$ and $g_4$. As $g_3$ is eliminated, $g_2$ is useless and thus can be eliminated too. That is, in the case where all the input gates are of fan-out one, we can eliminate four gates (including the input gate) by one affine restriction.

Finally, we have to argue that following the above strategy, the resulting restrictions are consistent. This can be take care by doing one more step in each step of elimination: when choosing a input gate to fix, go through all the other input gates $g$. If fixing $g$ to 0 (resp. 1) would be inconsistent with the restriction of this step, then fix $g$ to 1 (resp. 0). Note that this would only help us eliminating more gates!